The traditional Olympic motto of Citius, Altius, Fortius (Faster, Higher, Stronger) not only applies in the world of sports but also to the technical needs and requirements of STEMlab users. In the tech world, standing still means going backwards, and the constant upgrading of STEMlab specifications is only the logical result of combining this basic idea with the dynamic Red Pitaya philosophy.
But changes and improvements don’t always come in the form of large technological advances related to sampling frequencies and resolution. Sometimes, it´s enough to come up with an apparently simple but smart idea to make users’ lives much easier. For example, when browsing some of the blog posts on the Red Pitaya website, we find a whole range of practical and innovative case studies that make use of the versatile STEMlab units. In some of these studies we clearly see an imbalance in the use of analog I/Os:
In the master’s thesis project that led to the blog post Quantum computing with improved gate fidelity, only the inputs of a STEMlab 125-14 are used, and none of the outputs. In his conclusions, the author (A. Hungenberg) refers to one possible way of improving performance, related to the availability of additional inputs and increased noise reduction.
Finally, the most obvious example of a project that almost exclusively takes advantage of the ADC inputs of the STEMlab 125-14, and hardly any of its outputs, is the SPIDER Beam Source of the RFX Consortium, developed for the experimental thermonuclear fusion reactor prototype, ITER (Red Pitaya finding its way in the world of nuclear fusion). In this project a total of 12 FPGAs are installed in the different diagnostics elements, with 11 of them (integrated in the Dual Directional Couplers, Beamlet Current Measurement, and Beam Dump Current Measurement) only exploiting their input sampling capacities.
Figure 2 Red Pitaya units integrated in the SPIDER experiment diagnostics
These projects were successful and have been able to achieve their objectives, at the same time, the Red Pitaya team considered that there is still potential for additional value, especially for those projects where signal generation is not needed; however, 4 Hi-Speed input channels would be the perfect solution. This simple, smart solution will save desk or rack space, reducing the cost and power consumption of similar solutions by a significant factor.
On top of the increase in the number of input channels, this upgrade has been applied on the previously revamped STEMlab 125-14 model with the Xilinx Zynq 7020 SoC version, providing better noise and crosstalk reduction as well as superior computational capabilities, while maintaining its legendary flexibility and versatility, thanks to the customary open-source programmability.