Red Pitaya is great platform for teaching the design of digital signal processing systems at our Faculty of Electrical Engineering, where we introduce Xilinx Vivado and practice digital design in VHDL or Verilog. In the laboratory we connect STEMlab boards directly to a PC with an additional Ethernet card, so each student can access their own board through the web interface and SSH client.
From Red Pitaya GitHub sources we prepared a template Vivado FPGA project, where the students can replace rarely used PID with their digital component. After compilation, they upload the bitstream and run a small script to connect the Oscilloscope & Signal Generator web application to this. They control their component by developing a C program to set the registers and use the web application to generate or sample signals and effectively test their designs. Example student signal processing projects include:
an audio signal generator (electronic piano),
a digital signal AM/FM modulator or FIR filter, and
customized data sampling logic.
Electronic piano application running in a STEMlab terminal.
Sampled signals during audio playback.
We also extended STEMlab with an VGA interface board and developed custom graphics, such as an instrument sample display or a version of the classic arcade game Pong.
Applications of STEMlab with a custom VGA interface.
Some students choose a Red Pitaya device as a development board for their final projects. A particularly impressive project was a Time-to-Digital Converter (TDC), which can measure time differences in the range of 47.9 ms at a resolution of 11 ps!