Many experiments conducted in physics laboratories depend fundamentally on the detection of weak signals for data collection. The challenge lies in the low signal amplitude which makes them often indistinguishable from environmental noise. Lock-in amplifiers are frequently used in these kinds of applications to extract and amplify weak signals with a known carrier frequency from noisy environments through exploitation of their phase and frequency. However, these general-purpose instruments are often expensive and not optimized to the specific requirements of their application. As a solution to this, this team proposed building a low-cost digital lock-in amplifier optimized for low modulation frequency applications.
The Red Pitaya STEMlab 125-14 is an ideal candidate to develop a low-cost lock-in amplifier, with its built-in 14-bit ADCs and DACs, its convenient I/O processing through the ARM microcontroller, and digital signal processing using their Zynq 7010 FPGA. Other projects have attempted to use Red Pitaya boards for lock-in amplifiers, but we are the first project to have successfully implemented an external reference signal to drive the coherent detection. This project’s design includes a pre-processing PCB with a low-noise amplifier and anti-aliasing filter, and a physical user interface with switches, knobs, and an LCD display to adjust lock-in parameters (input sensitivity, reference phase offset, filter time constant, and output gain) in real time. This FPGA design includes a fully digital PLL to generate quadrature signals from the external reference signal with customizable phase offset inspired by Red Pitaya’s example Frequency Counter project. We also implemented a controllable digital low pass filter leveraging existing open-source libraries.
Read more about this project here.