Red Pitaya Blog | Case study

Scalable and Portable Fast Neutron Detection: Dual-Channel SiPM Readout with Red Pitaya FPGA DAQ

8 Sep

Academia, Case study

Scalable and Portable Fast Neutron Detection: Dual-Channel SiPM Readout with Red Pitaya FPGA DAQ

How researchers at Justus Liebig University Giessen combined plastic scintillators, dual SiPM...

Autonomous Sub-100ms Laser Relocking in Trapped-Ion Quantum Experiments: Scaling the BLOOD Lockbox Architecture with Red Pitaya SoCs

1 Sep

Case study

Autonomous Sub-100ms Laser Relocking in Trapped-Ion Quantum Experiments: Scaling the BLOOD Lockbox Architecture with Red Pitaya SoCs

How ETH Zurich’s Trapped Ion Quantum Information Group integrated on-chip XADC sensing and dynamic...

Femtosecond-Level Beam Stabilization With FPGA-Based Digital LLRF Feedback

20 Aug

Case study

Femtosecond-Level Beam Stabilization With FPGA-Based Digital LLRF Feedback

The evolution of FPGA development boards and control electronics over the last two decades has...

How AI Agents Can Automate FPGA Verification with Red Pitaya STEMlab PRO Gen 2 and MCP

4 Aug

Case study

How AI Agents Can Automate FPGA Verification with Red Pitaya STEMlab PRO Gen 2 and MCP

Artificial intelligence is beginning to transform FPGA verification and automated test workflows....

How Jefferson Lab Built Scalable Real-Time Accelerator Instrumentation Using FPGA-Based Data Acquisition

21 Jul

Case study

How Jefferson Lab Built Scalable Real-Time Accelerator Instrumentation Using FPGA-Based Data Acquisition

Modern particle accelerators generate enormous amounts of measurement data that must be acquired,...

ControlPaths: Building a GNU Radio SDR with Red Pitaya STEMlab

14 Jul

Media, Case study

ControlPaths: Building a GNU Radio SDR with Red Pitaya STEMlab

ControlPaths demonstrates how to transform a Red Pitaya STEMlab into a flexible software-defined...

Replacing Obsolete Windows XP DAQ Cards: A Modern CRDS Red Pitaya & LabVIEW Architecture

7 Jul

Case study

Replacing Obsolete Windows XP DAQ Cards: A Modern CRDS Red Pitaya & LabVIEW Architecture

Bypassing legacy hardware limitations to achieve stable, driver-independent Cavity Ring-Down...

Minimizing Optical Delay Lines in CV-MBQC: Sub-Microsecond Feed-Forward Loops with Red Pitaya FPGAs

29 Jun

Case study

Minimizing Optical Delay Lines in CV-MBQC: Sub-Microsecond Feed-Forward Loops with Red Pitaya FPGAs

Overcoming the classical latency bottleneck in Xanadu’s Aurora to suppress optical erosion and...

How to Achieve Sub-10-Micrometer Ultrasound Tracking with Red Pitaya FPGA Control

18 Jun

Case study

How to Achieve Sub-10-Micrometer Ultrasound Tracking with Red Pitaya FPGA Control

Bypassing vendor-locked instrumentation to capture real-time, non-invasive continuous hemodynamic...

How to Retrofit an Obsolete Spectrofluorometer using Red Pitaya FPGA Control

10 Jun

Case study

How to Retrofit an Obsolete Spectrofluorometer using Red Pitaya FPGA Control

Overcoming software and hardware obsolescence to enable advanced upconversion nanoparticle (UCNP)...

Case study

Scalable and Portable Fast Neutron Detection: Dual-Channel SiPM Readout with Red Pitaya FPGA DAQ

Autonomous Sub-100ms Laser Relocking in Trapped-Ion Quantum Experiments: Scaling the BLOOD Lockbox Architecture with Red Pitaya SoCs

Femtosecond-Level Beam Stabilization With FPGA-Based Digital LLRF Feedback

How AI Agents Can Automate FPGA Verification with Red Pitaya STEMlab PRO Gen 2 and MCP

How Jefferson Lab Built Scalable Real-Time Accelerator Instrumentation Using FPGA-Based Data Acquisition

ControlPaths: Building a GNU Radio SDR with Red Pitaya STEMlab

Replacing Obsolete Windows XP DAQ Cards: A Modern CRDS Red Pitaya & LabVIEW Architecture

Minimizing Optical Delay Lines in CV-MBQC: Sub-Microsecond Feed-Forward Loops with Red Pitaya FPGAs

How to Achieve Sub-10-Micrometer Ultrasound Tracking with Red Pitaya FPGA Control

How to Retrofit an Obsolete Spectrofluorometer using Red Pitaya FPGA Control

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